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Nordic Semiconductor /nrf52 /TIMER0 /INTENCLR

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Interpret as INTENCLR

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https://regviz.com/r/Nordic Semiconductor/nrf52/TIMER0/INTENCLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disabled)COMPARE0 0 (Disabled)COMPARE1 0 (Disabled)COMPARE2 0 (Disabled)COMPARE3 0 (Disabled)COMPARE4 0 (Disabled)COMPARE5

COMPARE5=Disabled, COMPARE3=Disabled, COMPARE2=Disabled, COMPARE0=Disabled, COMPARE4=Disabled, COMPARE1=Disabled

Description

Disable interrupt

Fields

COMPARE0

Write ‘1’ to Disable interrupt for COMPARE[0] event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
COMPARE1

Write ‘1’ to Disable interrupt for COMPARE[1] event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
COMPARE2

Write ‘1’ to Disable interrupt for COMPARE[2] event

0 (Disabled): Read: Disabled

1 (Enabled): Read: Enabled

1 (Clear): Disable
COMPARE3

Write ‘1’ to Disable interrupt for COMPARE[3] event

0 (Disabled): Read: Disabled

1 (Enabled): Read: Enabled

1 (Clear): Disable
COMPARE4

Write ‘1’ to Disable interrupt for COMPARE[4] event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled
COMPARE5

Write ‘1’ to Disable interrupt for COMPARE[5] event

0 (Disabled): Read: Disabled

1 (Clear): Disable

1 (Enabled): Read: Enabled

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  3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data